Make

Syntax Commands

Makefile syntax has unique rules. Learn about rules, patterns, conditionals, and functions for effective Make usage.

10 commands

Pro Tips

Recipe lines MUST start with a tab, not spaces. This is a common error.

Use $(wildcard) and $(shell) functions for dynamic file discovery.

Common Mistakes

Spaces instead of tabs cause 'missing separator' errors.

Commands

Basic rule

$ target: prerequisites recipe

Standard Makefile rule structure.

Phony target

$ .PHONY: clean test build

Declare non-file targets.

Pattern rule

$ %.o: %.c $(CC) -c $< -o $@

Rule for multiple targets with pattern.

Include file

$ include config.mk

Include another Makefile.

Conditional

$ ifeq ($(DEBUG),1) CFLAGS += -g endif

Conditional variable setting.

Define function

$ define COMPILE $(CC) -c $1 -o $2 endef

Define multi-line variable/function.

Call function

$ $(call COMPILE,src.c,src.o)

Invoke defined function.

Shell function

$ FILES := $(shell find src -name '*.c')

Capture shell command output.

Wildcard function

$ SRCS := $(wildcard src/*.c)

Expand wildcard pattern.

Substitution

$ OBJS := $(SRCS:.c=.o)

Replace .c with .o extension.